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A Comparative Study Of Ballistic SOI DG NMOS For 9.8nm Gate-Length With Mixed Gate-Oxide Over Single Gate-Oxide By DC And RF Analysis

Mukesh Kumar Suman, Sandeep Kumar, Brinda Bhowmick

Over the last decade Multi Gate SOI MOSFET devices have seen a lot of potential improvements. As per the ITRS predictions, the 10nm node technology must be adopted in these devices within the year 2021 for satisfying the increasing needs of high performance logic, low operating power as well as standby power. In this paper, we report 3 different arrangements of Gate oxide for ultrathin SOI MOSFET along with their influence on electrical as well as capacitive behavior in low frequency range. Furthermore, we also analyzed the RF behavior of this device under consideration by successful variation in the scattering parameters. For, this purpose two-dimensional selfconsistent Schrodinger–Poisson solver with Neumann boundary condition is used to capture the quantum mechanical nature of carrier transport along with a nonequilibrium Green’s function (NEGF) approach. We also investigated the effect of different gate oxide arrangements on fT, fmax, current gain, maximum available gain, maximum stable gain, stern stability factor.