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Realization of High Speed VLSI Architecture for Decision Tree Based Denoising Method In Images

Gobu.CK and Priya.R

In the process of signal acquisition and transmission image signals might be corrupted by impulse noise. Efficient VLSI implementation is presented in this paper, in order to remove impulse noise. In order to perform better visual quality, edge features should be preserved. Pixels that are detected as noisy are filtered, the others remain unchanged. Here fixed value impulse noise is removed and implemented in VLSI. The VLSI architecture of our design yields a processing rate of about 200 MHz by using TSMC 0.18μm technology. Compared with the state-of-the-art techniques, this work can reduce memory storage by more than 99%. The design requires only low computational complexity and two line memory buffers. Its hardware cost is low and suitable to be applied to many real-time applications.