Abstrato

?Ancient Indian Vedic Mathematics Based Multiplier Design for High Speed and Low Power Processor?

Mr. Nishant G. Deshpande , Prof. Rashmi Mahajan

The use of Vedic mathematics lies in the fact that it reduces the typical calculation in the conventional mathematics to very simple once. This is so because the Vedic formulae have claimed to be building on the natural principles on which the human mind works. Vedic mathematics is a several effective algorithms, which has spread over to various branches of engineering such as computing.. In this work, I have studied different multipliers, which give low power requirement and high speed, also give information of “urdhva-Tiryabhyam” algorithm of ancient Indian Vedic mathematics, which has utilized for multiplication to improve speed, area parameters of multipliers. . In this paper Urdhva-Tiryakbhyam sutra has been implemented with Xilinx (VHDL) and results are presented. This has improved speed of multipliers. After implementing the sutra with 8-bit it has been observed that Vedic multiplication is efficient in terms of speed.