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Analysis of 16 Bit Microprocessor Architecture on FPGA Using VHDL

Nupur Gupta, Pragati Gupta, Himanshi Bajpai, Richa Singh, Shilpa Saxena

This paper involves the design and simulation of 16 bit microprocessor architecture on FPGA using VHDL. Significant features such as the , increased speed ,minimal implementation real-estate, reduction in power and maximum configurability are provided by several FPGAs. Where earlier a design may have included 6 to 10 ASICs, but today the same design can be achieved using only single FPGA.VHDL is used in order to programme FPGA.VHDL is an acronym for very high-speed integrated circuit hardware description language. This model actually represents the textual description of a hardware design or a piece of design which, when simulated mimics the design behavior .The processor contains a number of basic modules. These modules are register array of 8X16 bit register, an ALU, shift register, program counter , an instruction register ,an address register, a comparator and control unit. All of these units or modules are assembled together and communicate through a common 16 bit tristate data bus.